<p><B>Varma, Ambrish Kant. Computer - Aided Tools for Seamless High DensityInterconnects. (Under the direction of Paul D. Franzon)</B><BR>This thesis presents the tool-set designed to demonstrate the possibility of using theCadence tools to design, verify and extract circuitry on the substrate along with theon-chip design. This circuitry could be an inter-chip connection that connects twodifferent chips or an intra-chip connection where a long interconnect is taken off fromthe active area of the chip to the substrate and back on to the same chip.<BR>To be able to do this task, the work for this project is broadly classified into fourdifferent categories. These are writing<BR> The technology file and the display.drf file The Design Rule Check deck The Layout Verses Schematic deckAfter having completed the above-mentioned tasks, the tool-set was also tested andimplemented on a circuit.<P>
Identifer | oai:union.ndltd.org:NCSU/oai:NCSU:etd-20010410-171850 |
Date | 12 April 2001 |
Creators | Varma, Ambrish Kant |
Contributors | Dr. Paul D. Franzon, Dr. Eric Rotenberg, Dr. Greg Byrd |
Publisher | NCSU |
Source Sets | North Carolina State University |
Language | English |
Detected Language | English |
Type | text |
Format | application/pdf |
Source | http://www.lib.ncsu.edu/theses/available/etd-20010410-171850 |
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