by Yeung Chung Toa. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1994. / Includes bibliographical references (leaves 63-[65]). / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Bandwidth required by multimedia applications --- p.1 / Chapter 1.2 --- Real-time requirement --- p.2 / Chapter 1.3 --- Multicasting --- p.2 / Chapter 1.4 --- Other networks --- p.3 / Chapter 1.5 --- Overview of CUM LAUDE NET --- p.5 / Chapter 1.5.1 --- Protocols --- p.7 / Chapter 1.5.2 --- Network Services --- p.8 / Chapter 1.6 --- Scope of the Thesis --- p.9 / Chapter 2 --- Network Architecture --- p.11 / Chapter 2.1 --- CUM LAUDE NET Architectural Overview --- p.11 / Chapter 2.2 --- Level One Network Architecture --- p.12 / Chapter 2.3 --- Level-One Router --- p.14 / Chapter 2.3.1 --- packet forwarding --- p.14 / Chapter 2.3.2 --- packet insertion --- p.15 / Chapter 2.3.3 --- packet removal --- p.15 / Chapter 2.3.4 --- fault protection --- p.15 / Chapter 2.4 --- Hub --- p.16 / Chapter 2.5 --- Host & Network Interface Card --- p.17 / Chapter 3 --- Protocol --- p.19 / Chapter 3.1 --- Design Overview --- p.19 / Chapter 3.2 --- Layering --- p.20 / Chapter 3.3 --- "Segment, Datagram, and Packet Format" --- p.21 / Chapter 3.3.1 --- IP/VCI field --- p.23 / Chapter 3.4 --- Data Link --- p.23 / Chapter 3.4.1 --- byte format and data link synchronization --- p.23 / Chapter 3.4.2 --- access control byte --- p.24 / Chapter 3.4.3 --- packet/frame boundary --- p.26 / Chapter 3.5 --- Fast Packet Routing Protocol --- p.26 / Chapter 3.5.1 --- Level-2/Level-l Bridge/Router --- p.27 / Chapter 3.5.2 --- Level-1 Hub --- p.29 / Chapter 3.5.3 --- Local Host NIC --- p.29 / Chapter 3.6 --- Media Access Control Protocol I : ACTA --- p.30 / Chapter 3.7 --- Media Access Control Protocol II: Hub Polling --- p.34 / Chapter 3.8 --- Protocol Implementation on CUM LAUDE NET --- p.36 / Chapter 4 --- Hardware Implementation & Performance of Routers and NIC --- p.40 / Chapter 4.1 --- Functionality of Router --- p.40 / Chapter 4.2 --- Important Components Used in the Router Design --- p.43 / Chapter 4.2.1 --- TAXI Transmitter and Receiver --- p.43 / Chapter 4.2.2 --- First-In-First-Out Memory (FIFO) --- p.44 / Chapter 4.3 --- Design of Router --- p.45 / Chapter 4.3.1 --- Version 1 --- p.45 / Chapter 4.3.2 --- Version 2 --- p.47 / Chapter 4.3.3 --- Version 3 --- p.50 / Chapter 4.4 --- Lessons Learned from the High Speed Router Design --- p.57 / Chapter 5 --- Conclusion --- p.61 / Bibliography --- p.63
| Identifer | oai:union.ndltd.org:cuhk.edu.hk/oai:cuhk-dr:cuhk_318171 |
| Date | January 1994 |
| Contributors | Yeung, Chung-toa., Chinese University of Hong Kong Graduate School. Division of Information Engineering. |
| Publisher | Chinese University of Hong Kong |
| Source Sets | The Chinese University of Hong Kong |
| Language | English |
| Detected Language | English |
| Type | Text, bibliography |
| Format | print, vi, 63, [2] leaves : ill. (some mounted col.) ; 30 cm. |
| Rights | Use of this resource is governed by the terms and conditions of the Creative Commons “Attribution-NonCommercial-NoDerivatives 4.0 International” License (http://creativecommons.org/licenses/by-nc-nd/4.0/) |
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