Unified Modeling Language (UML) allows software engineers to use a standard way of expressing a design approach at a high level. The benefits of system modeling are well accepted in the software development community. Modeling of Very High Speed Integrated Circuit Hardware Description Language (VHDL) designs, for synthesizing into hardware, is a common practice also. The research herein looks at system modeling of a design using UML, in which there are both software and hardware components. The idea is to explore modeling of the system with the ability to abstract whether the implementation of a particular function is realized in software or hardware. The designer can then model/evaluate a given system design approach and later allocate functions to software and hardware, as appropriate to meet constraints such as performance, cost, schedule. Since using UML for software is a standard approach, this research investigates the UML to hardware path via VHDL. / Department of Computer Science
| Identifer | oai:union.ndltd.org:BSU/oai:cardinalscholar.bsu.edu:handle/188439 |
| Date | January 2008 |
| Creators | Sprunger, Steven J. |
| Contributors | Zage, Dolores M. |
| Source Sets | Ball State University |
| Detected Language | English |
| Format | vi, 46 leaves : ill. ; 28 cm. |
| Source | Virtual Press |
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