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A high performance hardware implementation of the imbedded reference signal algorithm using a digital signal processing board /

Thesis (Ph.D.)--Ohio University, November, 2004. / Includes bibliographical references (leaves 124-126)

Identiferoai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/60642840
Date January 2004
CreatorsAl-Sharari, Hamed.
Source SetsOCLC
LanguageEnglish
Detected LanguageEnglish

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