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Compact modelling of partially depleted silicon-on-insulator MOSFETs for analogue circuit simulation

No description available.
Identiferoai:union.ndltd.org:bl.uk/oai:ethos.bl.uk:245003
Date January 1997
CreatorsLee, Michael Siu Lun
PublisherUniversity of Southampton
Source SetsEthos UK
Detected LanguageEnglish
TypeElectronic Thesis or Dissertation

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