Normal-Superconductor-Superconductor (NSS) single-electron tunneling (SET) transistors were studied. A hysteresis in the current versus gate voltage curve was found in a SET transistor and SET trap hybrid system. This hybrid system can be used as a new type of memory cell in electronics. The inferred junction capacitance, as extracted from the nonlinear current-voltage characteristics, was measured as a function of magnetic field and temperature. Noise issue in SET transistor was studied as well.
| Identifer | oai:union.ndltd.org:UMASS/oai:scholarworks.umass.edu:dissertations-3360 |
| Date | 01 January 2000 |
| Creators | Jiang, Chong |
| Publisher | ScholarWorks@UMass Amherst |
| Source Sets | University of Massachusetts, Amherst |
| Language | English |
| Detected Language | English |
| Type | text |
| Source | Doctoral Dissertations Available from Proquest |
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