The structure of cellular arrays and Tessellation Automata are introduced as a "fabric" for use in the implementation of self-testing and self-repairing computational configurations. Testing schemes are suggested for use in the "self-testing" operation of this computer system. Sequentially propagating tests are examined for both finite and infinite geometries of cellular arrays. A static parallel testing procedure is also suggested which offers these advantages: (1) the parallel testing procedure is transparent to the computer configuration, (2) very little computational down-time" results from testing, and (3) the parallel testing procedure does not initiate reconfiguration of the computational configuration. / Master of Science
| Identifer | oai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/43244 |
| Date | 12 June 2010 |
| Creators | Gregory, Walter Lee |
| Contributors | Electrical Engineering, Thompson, Richard A., Gray, Festus Gail, Bostian, Charles W. |
| Publisher | Virginia Tech |
| Source Sets | Virginia Tech Theses and Dissertation |
| Language | English |
| Detected Language | English |
| Type | Thesis, Text |
| Format | viii, 103 leaves, BTD, application/pdf, application/pdf |
| Rights | In Copyright, http://rightsstatements.org/vocab/InC/1.0/ |
| Relation | OCLC# 39802592, LD5655.V855_1977.G74.pdf |
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