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Previous issue date: 2013-12-18 / Coordena??o de Aperfei?oamento de Pessoal de N?vel Superior / The use of Field Programmable Gate Array (FPGA) for development of digital
control strategies for power electronics applications has aroused a growing interest of
many researchers. This interest is due to the great advantages offered by FPGA, which
include: lower design effort, high performance and highly flexible prototyping. This
work proposes the development and implementation of an unified one-cycle controller
for boost CFP rectifier based on FPGA. This controller can be applied to a total of
twelve converters, six inverters and six rectifiers defined by four single phase VSI
topologies and three voltage modulation types. The topologies considered in this work
are: full-bridge, interleaved full-bridge, half-bridge and interleaved half-bridge. While
modulations are classified in bipolar voltage modulation (BVM), unipolar voltage
modulation (UVM) and clamped voltage modulation (CVM). The proposed project is
developed and prototyped using tools Matlab/Simulink? together with the DSP Builder
library provided by Altera?. The proposed controller was validated with simulation and
experimental results / A utiliza??o de Field Programmable Gate Array (FPGA) para o
desenvolvimento de estrat?gias de controle digital para aplica??es em eletr?nica de
pot?ncia tem despertado um crescente interesse entre muitos pesquisadores. Tal
interesse se deve as grandes vantagens apresentadas pelo FPGA, que incluem: menor
esfor?o de projeto, alto desempenho e grande flexibilidade de prototipagem. Este
trabalho prop?e o desenvolvimento e implementa??o de um controlador unificado,
mediante o uso de FPGA, utilizando a t?cnica de controle de um ciclo (One-Cycle
Control Technique) para corre??o de fator de pot?ncia com retificadores boost. Este
controlador pode ser aplicado a um total de doze conversores, sendo seis inversores e
seis retificadores, definidos pela topologia e pelo tipo de modula??o de tens?o. As
topologias consideradas neste trabalho s?o: ponte completa, ponte completa intercalada,
meia ponte e meia ponte intercalada. Enquanto que as modula??es s?o classificadas em
modula??o bipolar de tens?o (MBT), modula??o unipolar de tens?o (MUT) e
modula??o com grampeamento de tens?o (MGT). O projeto ? desenvolvido e
prototipado utilizando as ferramentas Matlab?/Simulink em conjunto com a biblioteca
DSP Builder, disponibilizada pela Altera?. O controlador proposto ? com resultados de
simula??o e experimentais
| Identifer | oai:union.ndltd.org:IBICT/oai:repositorio.ufrn.br:123456789/15499 |
| Date | 18 December 2013 |
| Creators | Soares, Antonio Wallace Antunes |
| Contributors | CPF:78977320704, http://lattes.cnpq.br/2695103433954752, Roda, Valentin Obac, CPF:59464305800, http://lattes.cnpq.br/4823406157799513, Pra?a, Paulo Peixoto, CPF:85869406315, http://lattes.cnpq.br/9209433351163629, Bento, Aluizio Alves de Melo |
| Publisher | Universidade Federal do Rio Grande do Norte, Programa de P?s-Gradua??o em Engenharia El?trica, UFRN, BR, Automa??o e Sistemas; Engenharia de Computa??o; Telecomunica??es |
| Source Sets | IBICT Brazilian ETDs |
| Language | Portuguese |
| Detected Language | Unknown |
| Type | info:eu-repo/semantics/publishedVersion, info:eu-repo/semantics/masterThesis |
| Format | application/pdf |
| Source | reponame:Repositório Institucional da UFRN, instname:Universidade Federal do Rio Grande do Norte, instacron:UFRN |
| Rights | info:eu-repo/semantics/openAccess |
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