The main circuit equipment in an HVDC station must be rated for continuous operation as well as for stresses during ground faults and other short circuits. The component impedances are thus selected for proper operation during both continuous operation and short circuit events. Normally, Electromagnetic Transient (EMT) simulations are performed for the short circuit current ratings, which can leadto time consuming iterations for the optimization of impedance values. Hence, sufficiently correct and handy formulas are useful. For that reason, in this research work, firstly, a thorough literature study is done to gain a deep understanding of the modular multilevel converter (MMC) and its behaviour after aDC pole-to-pole short circuit fault. Two associated simulation models are designed in PSCAD/EMTDC simulation software. The focus of this thesis is on DC pole-topoleshort circuit in Symmetric Monopole HVDC VSC Modular Multilevel Converter (MMC). The desired analytical expression for the steady state fault current is determined byusing mesh analysis and also by applying KCL and it is verified by doing a set of simulations in PSCAD. A detailed sensitivity study has been done in the PSCAD simulation software to understand the influence of the AC converter reactor inductance and the DC smoothing reactor inductance on the steady state as well as peak fault current respectively. From the sensitivity study, the simulated values of peak factor have been obtained. By means of the ratio in between DC side inductance (L_DC) and AC side inductance (L_AC), and by performing a number of calculations, the desired expression for the peak factor is derived. As a result, the peak fault current can be calculated. The calculated value of the peak fault current from the derived formula is compared to the simulated value and validated. An over-estimation is considered for the rating of the equipment. Along with that, the analysis of the effect of impedances of equipment and systems are done and also verified, to better judge the accuracy of the result. In the result, it is found that, the error margin obtained from the derived analytical expression for the steady state value is within 2% of the PSCAD simulated value, which means the error can be safely ignored. Similarly, the value obtained from the derived formula for the peak fault current is within 4% over-estimation margin of the PSCAD simulated value, which is quite good in terms of cost estimation for the rating of the components.
| Identifer | oai:union.ndltd.org:UPSALLA1/oai:DiVA.org:uu-476658 |
| Date | January 2022 |
| Creators | SinhaRoy, Soham |
| Publisher | Uppsala universitet, Institutionen för elektroteknik |
| Source Sets | DiVA Archive at Upsalla University |
| Language | English |
| Detected Language | English |
| Type | Student thesis, info:eu-repo/semantics/bachelorThesis, text |
| Format | application/pdf |
| Rights | info:eu-repo/semantics/openAccess |
| Relation | ELEKTRO-MFE ; 22006 |
Page generated in 0.0021 seconds