High conversion efficiency and fast transient response at high switching frequency are the two main challenges for low-voltage high-current DC-DC converters, which are the motivations of the dissertation work.
To reduce the switching power loss, soft switching is a desirable technique to keep power loss under control at high switching frequencies. A Duty-Cycle-Shift (DCS) concept is proposed for half-bridge DC-DC converters to reduce switching loss. The concept of this new control scheme is shifting one of the two symmetric PWM driving signals close to the other, such that ZVS can be achieved for the lagging switch due to the shortened resonant interval.
By applying a basic DCS concept to a conventional half-bridge DC-DC converter, Zero-Voltage-Switching is achieved for one of the two primary switches. To achieve ZVS for the other switch, a ZVS half-bridge topology is proposed. Basically, by adding an active branch to the conventional half-bridge topology, the leakage inductance energy is trapped during the freewheeling time, and the energy is released to achieve ZVS for the other switch. In addition, a modified ZVS half-bridge topology is proposed to ground the auxiliary switch, and thus, a simple drive circuitry can be applied to the auxiliary switch.
Leakage inductance leads to ringing issue in a half-bridge DC-DC converter. An active-clamp snubber topology is presented in the half-bridge DC-DC converters to recycle the leakage inductance energy and attenuate the ringing. Since dissipative snubbers are removed, a converter can operate more efficiently.
Body-diode reverse-recovery-related loss in SRs increases with the switching frequency. To reduce this reverse-recovery loss, two passive snubber circuits are proposed for SR rectifiers in a current dubler rectifier. The proposed snubbers attenuate reverse recovery ringing and higher efficiencies are achieved.
A unified DC model is derived based on the state-space average equation, which is suited for both symmetric and asymmetric half-bridge DC-DC converters. Furthermore, the DC analysis is conducted based on the unified DC model for symmetric and asymmetric half-bridge DC-DC converters with current-doubler rectifier. The AC model of isolated DC-DC converters is also established, and output impedance is analyzed for the purpose of transient response investigation.
A two-stage approach is a trade-off between conversion efficiency and fast transient response. Full-Duty-Cycle (FDC) two-stage architecture is proposed to achieve desirable open-loop output impedance and fast transient response. Class-D resonant converters are investigated and recognized as potential topologies to reduce switching loss and SR conduction loss. Considering the limited regulation capability of class-D resonant converters, low-Q SRC and LLC resonant converters are proposed as candidate topologies in two-stage approaches.
| Identifer | oai:union.ndltd.org:ucf.edu/oai:stars.library.ucf.edu:rtd-6102 |
| Date | 01 January 2004 |
| Creators | Mao, Hong |
| Publisher | University of Central Florida |
| Source Sets | University of Central Florida |
| Language | English |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | Retrospective Theses and Dissertations |
| Rights | Written permission granted by copyright holder to the University of Central Florida Libraries to digitize and distribute for nonprofit, educational purposes. |
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