Switched mode power supplies (SMPS) have found wide spread acceptance in all power processing applications. The design demand is moving towards higher power densities. For reduction in size and weight, it is imperative to process the power at a higher switching frequency. High switching frequency requires soft switching techniques to reduce the switching losses. Several families of soft switching converters have emerged in the past two decades. Analysis and modelling methods have been proposed in relation with these topologies.
Active clamp converters are the recently introduced soft switching topologies. Steady state analysis and model of these converters have been reported in literature. This thesis presents a unified equivalent circuit oriented model for the family of active clamp converters. Analytical expressions for DC conversion ratio in terms of pole current and throw voltage are derived for all the DC-DC converters with active clamp. The special feature is that, the conversion ratio exhibits a load dependent drop (IRd), where I is the pole current and Rd is the damping resistance. The damping resistance Rd is a mathematical artifact to represent the voltage loss on account of delay in the turn-on of the active switch. There is no energy loss associated with this load dependent drop. This is conveniently expressed as an appropriate lossless resistance in the equivalent circuit model. The proposed equivalent circuit models are valid for both steady-state and dynamic performance. A spread sheet based design is presented for the basic DC-DC converters with active clamp. A prototype design following the spreadsheet is made. The performance of the same is validated and verified by simulation and measurements. Steady state and dynamic results are presented. The stability criterion for the active clamp converters under current programming is investigated. The same is verified through simulation and validated on a current programmed active clamp converter prototype.
The active clamp converters suffer from a few disadvantages: Higher VA ratings of
switches, load dependent ZVS performance and increased component count. Several soft switching topologies have been reported in literature. Efficiency improvement and increase in switching frequency are obtained to different degrees.
This thesis proposes a new family of soft switching converters. This family of converters switch at constant frequency and maintains the advantages of traditional PWM converters. The proposed topology employs an auxiliary circuit to achieve soft switching. The auxiliary circuit consists of a dependent voltage source, an auxiliary switch, a series diode and a set of resonant elements (Inductor and capacitor). The switching transitions of both the active switch and the auxiliary switch are lossless. The novelty in the proposed circuit is the method of generating the dependent source required to enable zero current switching of the auxiliary switch. The dependent source is realized by a coupled winding in the energy storage inductor or tapped from the energy transfer transformer of non-isolated and isolated converters respectively.
The proposed topology is applicable to most of the isolated and non-isolated DC-DC converters. The circuit equations governing the sub-intervals of the converter are expressed in terms of pole current and throw voltage. With such a definition, performance results and the design equations are identical for all types of DC-DC converters. Equivalent circuit models are obtained for the whole family of DC-DC converters. The proposed model is valid for steady state and dynamic performance. Analytical expressions of DC conversion ratio for all topologies, in terms of pole current and throw voltage are derived. The special feature is that, the conversion ratio exhibits a load dependent drop (IRd), where I is the pole current and Rd is the damping resistance. The damping resistance Rd is a mathematical artifact to represent the voltage loss on account of delay in the turn-on of the active switch. There is no energy loss associated with this load dependent drop. This is conveniently expressed as an appropriate lossless resistance in the equivalent circuit model. Design guidelines are established for the whole family of proposed converters; the same are validated through prototype converters.
| Identifer | oai:union.ndltd.org:IISc/oai:etd.ncsi.iisc.ernet.in:2005/613 |
| Date | 06 1900 |
| Creators | Lakshminarasamma, N |
| Contributors | Ramanarayanan, V |
| Source Sets | India Institute of Science |
| Language | en_US |
| Detected Language | English |
| Type | Thesis |
| Relation | G21526 |
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