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Návrh rychlé měřící karty s využitím programovatelných hradlových polí / Fast measuring card design using programmable gate arrays

This thesis contains information about fast measuring card design for data processing from NQR measuring probe. The overall purpose is to create functional prototype of measuring card. Thesis describes suitable design of PCB having regard to EMC. There are information abou digital signal processing, using algorithms DFT and FFT. The thesis contains information about FPGA and there are rules, how to program FPGA correctly. In the practical part of the thesis, there are information about PCB design of ADC and DAC. There are also information about design of program for FPGA and control application for PC.

Identiferoai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:219942
Date January 2013
CreatorsBadin, Pavel
ContributorsHavránek, Zdeněk, Klusáček, Stanislav
PublisherVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií
Source SetsCzech ETDs
LanguageCzech
Detected LanguageEnglish
Typeinfo:eu-repo/semantics/masterThesis
Rightsinfo:eu-repo/semantics/restrictedAccess

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