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Development of VHDL behavioral models with back annotated timing /

Thesis (M.S.)--Virginia Polytechnic Institute and State University, 1994. / Vita. Abstract. Includes bibliographical references (leaves 99-101). Also available via the Internet.

Identiferoai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/30815762
Date January 1994
CreatorsNarayanaswamy, Sathyanarayanan.
Source SetsOCLC
LanguageEnglish
Detected LanguageEnglish
SourceThis resource online

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