FPGA-based hardware accelerator design for performance improvement of a system-on-a-chip application

Description

Thesis (M.S.)--State University of New York at Binghamton, Department of Electrical and Computer Engineering. / Includes bibliographical references (p. 55-56).

Links & Downloads

1. http://referenc.lib.binghamton.edu:2048/login?url= http://wwwlib.umi.com/dissertations/fullcit/1432111

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Additional Fields

Identifer	oai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/256466044
Date	January 2005
Creators	Vyas, Dhaval N.
Source Sets	OCLC
Language	English
Detected Language	English
Type	Web sites. Electronic dissertations.
Source	Online access via UMI: