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An architectural synthesis tool for VLSI signal processing chips

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1. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.295432

Identifer	oai:union.ndltd.org:bl.uk/oai:ethos.bl.uk:295432
Date	January 1995
Creators	Trainor, David William
Publisher	Queen's University Belfast
Source Sets	Ethos UK
Detected Language	English
Type	Electronic Thesis or Dissertation