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Dekódování RDS zpráv obvodem FPGA / The RDS decoder on the FPGA

This thesis deals with demodulation, decoding RDS messages and an FM receiver in FPGA. It is the processing of data after A/D conversion of radio stereo signal. This work contains detailed theoretical knowledge of the RDS system, of the individual types of messages, their demodulation and subsequent decoding of individual services. There is theoretically analyzed in FPGA platform and implementation of RDS System and FM receiver.

Identiferoai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:220689
Date January 2014
CreatorsVedra, Lukáš
ContributorsBobula, Marek, Štohanzl, Milan
PublisherVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií
Source SetsCzech ETDs
LanguageCzech
Detected LanguageEnglish
Typeinfo:eu-repo/semantics/masterThesis
Rightsinfo:eu-repo/semantics/restrictedAccess

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