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Implementation Of A Df Algorithm On An Fpga Platform

In this thesis work, the implementations of the monopulse amplitude comparison and phase
comparison DF algorithms are performed on an FPGA platform. After the mathematical
formulation of the algorithms using maximum-likelihood approach is done, software
simulations are carried out to validate and find the DF accuracies of the algorithms under
various conditions. Then the algorithms are implemented on an FPGA platform by utilizing
platform specific software tools. Block diagrams of the hardware implementations are given
and explained in detail. Then simulations of hardware implementation of both algorithms are
performed. Using the results of the simulations, DF accuracies under certain conditions are
evaluated and compared to software simulations results.

Identiferoai:union.ndltd.org:METU/oai:etd.lib.metu.edu.tr:http://etd.lib.metu.edu.tr/upload/12607797/index.pdf
Date01 October 2006
CreatorsIpek, Abdullah Volkan
ContributorsSevercan, Mete
PublisherMETU
Source SetsMiddle East Technical Univ.
LanguageEnglish
Detected LanguageEnglish
TypeM.S. Thesis
Formattext/pdf
RightsTo liberate the content for public access

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