abstract: A workload-aware low-power neuromorphic controller for dynamic power and thermal management in VLSI systems is presented. The neuromorphic controller predicts future workload and temperature values based on the past values and CPU performance counters and preemptively regulates supply voltage and frequency. System-level measurements from stateof-the-art commercial microprocessors are used to get workload, temperature and CPU performance counter values. The controller is designed and simulated using circuit-design and synthesis tools. At device-level, on-chip planar inductors suffer from low inductance occupying large chip area. On-chip inductors with integrated magnetic materials are designed, simulated and fabricated to explore performance-efficiency trade offs and explore potential applications such as resonant clocking and on-chip voltage regulation. A system level study is conducted to evaluate the effect of on-chip voltage regulator employing magnetic inductors as the output filter. It is concluded that neuromorphic power controller is beneficial for fine-grained per-core power management in conjunction with on-chip voltage regulators utilizing scaled magnetic inductors. / Dissertation/Thesis / Ph.D. Electrical Engineering 2011
| Identifer | oai:union.ndltd.org:asu.edu/item:14383 |
| Date | January 2011 |
| Contributors | Sinha, Saurabh (Author), Cao, Yu (Advisor), Bakkaloglu, Bertan (Committee member), Yu, Hongbin (Committee member), Christen, Jennifer B. (Committee member), Arizona State University (Publisher) |
| Source Sets | Arizona State University |
| Language | English |
| Detected Language | English |
| Type | Doctoral Dissertation |
| Format | 99 pages |
| Rights | http://rightsstatements.org/vocab/InC/1.0/, All Rights Reserved |
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