Recent trend of minimization in microprocessors has introduced increasing self-heating effects in FinFET and MOSFET transistors. To study these self-heating effects, we developed self-consistent 3D models of FinFET and MOSFET basic logic gates, and simulated steady-state thermal transport for the worst heating case scenario. Incorporating size-dependent effective thermal conductivity of thin films instead of bulk values, these simulations provide a more accurate prediction of temperature rise in the logic gates. Results of our simulations predict higher temperature rise in FinFETs, compared to MOSFETs. Existence of buried oxide layer and confined geometry of FinFET structure are determined to be the most contributing to this higher temperature rise. To connect the results of our simulations to higher scale simulations, we proposed an equivalent thermal conductivity for each basic logic gate. These values were tested and found to be independent of the magnitude of chosen boundary conditions, as well as heat generation rate.
| Identifer | oai:union.ndltd.org:TORONTO/oai:tspace.library.utoronto.ca:1807/33496 |
| Date | 26 November 2012 |
| Creators | Pak Seresht, Elham |
| Contributors | Amon, Cristina |
| Source Sets | University of Toronto |
| Language | en_ca |
| Detected Language | English |
| Type | Thesis |
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