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Use of Monotonic Static Logic in Scaled, Leaky CMOS Technologies

This dissertation explores the characteristics of Monotonic-Static CMOS and its potential applications in leakage reduction in ultra scaled Bulk-Si technology with significant gate leakage currents. Using test circuits consisting of different configurations of 16-bit lookahead adders, we performed a comparison among static, monotonic static and domino logic in terms of various properties including power, delay, noise margin and area. Comparisons were done over a wide range of possible transistor widths to fully characterize the tradeoffs for each circuit type. Experimental results show that MS-CMOS has potential advantages in some situations in terms of stand-by power, evaluation speed and noise margin in such a technology.

Identiferoai:union.ndltd.org:columbia.edu/oai:academiccommons.columbia.edu:10.7916/D86D5S5P
Date January 2015
CreatorsIrez, Kagan
Source SetsColumbia University
LanguageEnglish
Detected LanguageEnglish
TypeTheses

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