An algorithm is derived for the removal of the DC offset from a faulted current signal using a microprocessor sampling on real-time. The algorithm is to be used instead of the analog Mimic circuit in distance computer relaying. Four variations of the algorithm were derived and tested to determine the best compromise between time response and noise sensitivity. The relay hardware is taken into consideration for the derivations to avoid adding any hardware to the relay. The graphical results of the test run in an analog simulator at the Virginia Tech Power Systems Laboratory are presented. Faults at different voltage angles were performed to determine the algorithm's performance at different levels of DC offset. From the graphical response obtained from the test and taking into consideration hardware and software limitations, a preferred algorithm is selected with a good compromise between time response and noise sensitivity. / Master of Science
| Identifer | oai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/43745 |
| Date | 15 July 2010 |
| Creators | Centeno, Virgilio A. |
| Contributors | Electrical Engineering, Phadke, Arun G., Rahman, Saifur, De La Ree, Jaime |
| Publisher | Virginia Tech |
| Source Sets | Virginia Tech Theses and Dissertation |
| Detected Language | English |
| Type | Thesis, Text |
| Format | ix, 74 leaves, BTD, application/pdf, application/pdf |
| Rights | In Copyright, http://rightsstatements.org/vocab/InC/1.0/ |
| Relation | OCLC# 18562754, LD5655.V855_1988.C467.pdf |
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