In this research work two contributions to the area of analog to digital data converters
have been discussed. The area of focus is the RSD-Cyclic and sigma-delta ADC. First a novel
hybrid RSD-Cyclic-sigma-delta architecture is introduced which is a combination of the RSDCyclic
ADC and sigma-delta ADC architectures. The resolution obtained with this hybrid
architecture is n = n1 + n2 , where n1 = MSBrsd stands for the most significant bits obtained from
the RSD-architecture and n2 = LSBsdl stands for the least significant bits obtained from the
sigma-delta architecture. Since the sigma-delta block is required to achieve only an n2-bit
resolution (n2, n1 < n ) the over-sampling ratio required for the sigma-delta is not as high as the
over-sampling ratio required to achieve n-bit resolution. Also the requirements on the RSD-Cyclic
block are only the requirements to achieve n1-bit resolution, which means that the
requirements on the analog building blocks for the RSD-Cyclic part are more relaxed. Secondly,
in the RSD-Cyclic area we have introduced a circuit technique that allows an entire ADC system
to run on one operational amplifier without any loss of functionality. Therefore we will be saving
power and area, both very desirable features for mobile applications. / Thesis (Ph.D.)--Wichita State University, College of Engineering, Dept. of Electrical and Computer Engineering / "July 2007."
| Identifer | oai:union.ndltd.org:WICHITA/oai:soar.wichita.edu:10057/1421 |
| Date | 07 1900 |
| Creators | Atris, Youssef H. |
| Contributors | Paarmann, Larry D. |
| Publisher | Wichita State University |
| Source Sets | Wichita State University |
| Language | en_US |
| Detected Language | English |
| Type | Dissertation |
| Format | xx, 253 p., 8789245 bytes, application/pdf |
| Rights | Copyright Youssef H. Artis, 2007. All rights reserved. |
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