Return to search

Growth, fabrication, and device characterization of indium gallium arsenide channel gallium arsenide-based heterostructure field effect transistors

A study of InGaAs channel heterostructure field effect transistors (HFETs) on GaAs substrates was undertaken utilizing the low pressure organometallic chemical vapor phase epitaxial (OMVPE) growth technique. Excellent quality HFET material properties were obtained for a split level donor structure, in which the Schottky gate was placed on an undoped AlGaAs layer grown on top of the doped AlGaAs donor layer. A one micron gate length fabrication process was developed to examine the device properties of these materials. A very strong correlation between material characterization results and device performance was observed in all cases. After demonstrating the consistency of the growth and fabrication processes using an $\rm In\sb{0.15}Ga\sb{0.85}As$ channel as a baseline, improvements to the device were undertaken. A delta doping technique was successfully developed and optimized using SIMS and Hall measurements to study the diffusion of the dopant spike. The sheet charge density and device transconductance increased for delta doped material. Increasing the channel indium content reduced the 2DEG mobility, but the expected improvements in transconductance and RF performance were observed. Critical layer thickness (CLT) issues were examined using $\rm In\sb{0.33}Ga\sb{0.67}As$ channel HFETs. Lightly dislocated material still exhibited superior device performance. An asymmetry in dislocation formation was observed, with dislocations forming preferentially in the (011) direction. Devices with a 50 A well width displayed a sharp drop in current in the (0-11) direction. The transconductance and RF properties were not as strongly affected. As the CLT was further exceeded the dislocation network became more symmetric and dense and device performance was severely degraded. A linear channel indium grading methodology was developed to delay the onset of misfit dislocations. Grading from 25-33% produced device properties commensurate with the ungraded 33% indium channel structure, without the asymmetry effects due to dislocation formation. Efforts at developing lattice constant engineered substrates were undertaken. Linear grading to 53% indium at a low growth temperature of 575$\sp\circ$C reduced the amount of three dimensional growth compared to other techniques.

Identiferoai:union.ndltd.org:UMASS/oai:scholarworks.umass.edu:dissertations-5463
Date01 January 1996
CreatorsLandini, Barbara Ellen
PublisherScholarWorks@UMass Amherst
Source SetsUniversity of Massachusetts, Amherst
LanguageEnglish
Detected LanguageEnglish
Typetext
SourceDoctoral Dissertations Available from Proquest

Page generated in 0.0018 seconds