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A Modular Pipeline Fast Fourier Transform Architecture

In DSP applications such as speech, image and video processing, receiving the output signal values in order is necessary for faster processing. For the same reason, Decimation-In-Time Fast Fourier Transform (DIT-FFT) is a method of implementation where the output signals are received in sequential order which avoids the extra circuitry required for re-ordering at the receiver. Modular FFT and Conventional FFT algorithms are methods of implementations to compute the Discrete Fourier Transform (DFT). An N-point Fast Fourier Transform requires v = log[superscript N][subscript r] butterfly stages to compute, for radix r. Implementation of the Modular Pipeline FFT (MP-FFT) algorithm differs from the Conventional FFT in terms of the storage of center elements after the v/2 stage. The Modular method of implementation reduces the computational requirements by nearly half without significant change in performance. We present a comparison between a Conventional FFT and Modular Pipeline FFT implementations in terms of the number of computations, latency and hardware utilization, which are substantiated by our implementations using Xilinx Virtex 5, Virtex 6 devices and Quartus Stratix IV, Stratix V devices. The output simulations are performed using Modelsim software. As the size of FFT increases from 16 to 1024 points, the efficiency in terms of number of multiplications required increases from 21.8% to 31.23% for Radix-2 and from 12.5% to 25% for Radix-. Estimated delay to compute the Modular algorithm shows an increased efficiency of 37.7% for Radix-2 and 24.08% for Radix-4 implementation when compared to Conventional FFT. Keywords: DFT, FFT, DIT-FFT, MP-FFT / A Thesis submitted to the Department of Electrical & Computer Engineering in partial fulfillment of the Master of Science. / Spring Semester 2017. / April 12, 2017. / Includes bibliographical references. / Linda DeBrunner, Professor Directing Thesis; Victor DeBrunner, Committee Member; Bruce A. Harvey, Committee Member.

Identiferoai:union.ndltd.org:fsu.edu/oai:fsu.digital.flvc.org:fsu_507697
ContributorsLakkadi, Alekhya (authoraut), DeBrunner, Linda S. (professor directing thesis), DeBrunner, Victor (committee member), Harvey, Bruce A. (committee member), Florida State University (degree granting institution), FAMU-FSU College of Engineering (degree granting college), Department of Electrical & Computer Engineering (degree granting departmentdgg)
PublisherFlorida State University, Florida State University
Source SetsFlorida State University
LanguageEnglish, English
Detected LanguageEnglish
TypeText, text, master thesis
Format1 online resource (74 pages), computer, application/pdf
RightsThis Item is protected by copyright and/or related rights. You are free to use this Item in any way that is permitted by the copyright and related rights legislation that applies to your use. For other uses you need to obtain permission from the rights-holder(s). The copyright in theses and dissertations completed at Florida State University is held by the students who author them.

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