VLSI implementation of cross-parity and modified dice fault tolerant schemes

Description

Thesis (M.S. in Electrical Engineering)--Washington State University. / Includes bibliographical references.

Links & Downloads

1. http://www.dissertations.wsu.edu/Thesis/Spring2004/d%5Fblum%5F043004.pdf

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Additional Fields

Identifer	oai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/55499752
Date	January 2004
Creators	Blum, Daniel Ryan,
Source Sets	OCLC
Language	English
Detected Language	English
Source	Online access for everyone