Using FPGA Co-processors for Improving the execution Speed of Pattern Recognition Algorithms in ATLAS LVL2 Trigger

Description

Mannheim, Univ., Diss., 2006.

Links & Downloads

1. urn:nbn:de:bsz:180-madoc-13332
2. http://nbn-resolving.de/urn:nbn:de:bsz:180-madoc-13332

Tags

Additional Fields

Identifer	oai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/315880324
Date	January 2006
Creators	Khomich, Andrei.
Publisher	[S.l. : s.n.],
Source Sets	OCLC
Language	English
Detected Language	English
Type	Online-Publikation.
Source	Kostenfrei