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Implementation of MOSFET High-Frequency Noise for RF ICs

<p> This thesis focuses on the noise model verification at both device and circuit levels using circuit simulators. The techniques and procedures developed in this thesis are general and can be applied to any proposed RF noise model equations. To fulfil the two tasks, three main topics have been accomplished. First, a general noise source implementation method has been presented in detail in this thesis and is verified with measurements for both long and short-channel MOSFETs. This method provides a simple and effective way to implement the enhanced channel noise and induced gate noise of MOSFETs without increasing the simulation complexity for the simulators.</p> <p> Second, a systematic procedure to refine the model parameters used in noise calculation is presented. For a model to accurately predict the HF noise characteristics, the accuracy in the prediction of both DC and AC characteristics has to be ensured. The procedure proposed in this thesis provides both DC and AC model parameter verification and optimization for RF noise simulation purpose.</p> <p> Third, as for benchmark circuits to verify noise model at the circuit level, two LNA designs are proposed in the thesis. The first design gives the emphasis on the noise reduction technique and the LNA design procedure. The proposed noise reduction technique gives circuit designers more control on noise figure minimization through noise matching. The second design is used to experimentally verify the noise model at the circuit level.</p> / Thesis / Master of Applied Science (MASc)

Identiferoai:union.ndltd.org:mcmaster.ca/oai:macsphere.mcmaster.ca:11375/21903
Date07 1900
CreatorsLi, Feng
ContributorsChen, C. H., Electrical and Computer Engineering
Source SetsMcMaster University
Languageen_US
Detected LanguageEnglish
TypeThesis

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