Ng Chong Chon. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2005. / Includes bibliographical references (leaves 100-103). / Abstract in English and Chinese. / 摘要 --- p.iii / Acknowledgments --- p.iv / Contents --- p.vi / List of Figures --- p.ix / List of Tables --- p.xii / Chapter Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Motivation --- p.1 / Chapter 1.2 --- Thesis Organization --- p.4 / Chapter Chapter 2 --- DMP Architecture --- p.6 / Chapter 2.1 --- Conventional DMP --- p.6 / Chapter 2.1.1 --- Operating Principle --- p.7 / Chapter 2.1.2 --- Disadvantages --- p.10 / Chapter 2.2 --- Pre-processing Clock Architecture --- p.10 / Chapter 2.2.1 --- Operating Principle --- p.11 / Chapter 2.2.2 --- Advantages and Disadvantages --- p.12 / Chapter 2.3 --- Phase-switching Architecture --- p.13 / Chapter 2.3.1 --- Operating Principle --- p.13 / Chapter 2.3.2 --- Advantages and Disadvantages --- p.14 / Chapter 2.4 --- Summary --- p.15 / Chapter Chapter 3 --- Full-Speed Divider Design --- p.16 / Chapter 3.1 --- Introduction --- p.16 / Chapter 3.2 --- Working Principle --- p.16 / Chapter 3.3 --- Design Issues --- p.18 / Chapter 3.4 --- Device Sizing --- p.19 / Chapter 3.5 --- Layout Considerations --- p.20 / Chapter 3.6 --- Input Sensitivity --- p.22 / Chapter 3.7 --- Modeling --- p.24 / Chapter 3.8 --- Review on Different Divider Designs --- p.28 / Chapter 3.8.1 --- Divider with Dynamic-Loading Technique --- p.28 / Chapter 3.8.2 --- Divider with Negative-Slew Technique --- p.30 / Chapter 3.8.3 --- LC Injection-Locked Frequency Divider --- p.32 / Chapter 3.8.4 --- Dynamic True Single Phase Clock Frequency Divider --- p.34 / Chapter 3.9 --- Summary --- p.42 / Chapter Chapter 4 --- 3V 900MHz Low Noise DMP --- p.43 / Chapter 4.1 --- Introduction --- p.43 / Chapter 4.2 --- Proposed DMP Topology --- p.46 / Chapter 4.3 --- Circuit Design and Implementation --- p.49 / Chapter 4.4 --- Simulation Results --- p.51 / Chapter 4.5 --- Summary --- p.53 / Chapter Chapter 5 --- 1.5V 2.4GHz Low Power DMP --- p.54 / Chapter 5.1 --- Introduction --- p.54 / Chapter 5.2 --- Proposed DMP Topology --- p.56 / Chapter 5.3 --- Circuit Design and Implementation --- p.59 / Chapter 5.3.1 --- Divide-by-4 stage --- p.59 / Chapter 5.3.2 --- TSPC dividers --- p.63 / Chapter 5.3.3 --- Phase-selection Network --- p.63 / Chapter 5.3.4 --- Mode-control Logic --- p.64 / Chapter 5.3.5 --- Duty-cycle Transformer --- p.65 / Chapter 5.3.6 --- Glitch Problem --- p.66 / Chapter 5.3.7 --- Phase-mismatch Problem --- p.70 / Chapter 5.4 --- Simulation Results --- p.70 / Chapter 5.5 --- Summary --- p.74 / Chapter Chapter 6 --- 1.5V 2.4GHz Wideband DMP --- p.75 / Chapter 6.1 --- Introduction --- p.75 / Chapter 6.2 --- Proposed DMP Architecture --- p.75 / Chapter 6.3 --- Divide-by-4 Stage --- p.76 / Chapter 6.3.1 --- Current-switch Combining --- p.76 / Chapter 6.3.2 --- Capacitive Load Reduction --- p.77 / Chapter 6.4 --- Simulation Results --- p.81 / Chapter 6.5 --- Summary --- p.83 / Chapter Chapter 7 --- Experimental Results --- p.84 / Chapter 7.1 --- Introduction --- p.84 / Chapter 7.2 --- Equipment Setup --- p.84 / Chapter 7.3 --- Measurement Results --- p.85 / Chapter 7.3.1 --- 3V 900GHz Low Noise DMP --- p.85 / Chapter 7.3.2 --- 1.5V 2.4GHz Low Power DMP --- p.88 / Chapter 7.3.3 --- 1.5V 2.4GHz Wideband DMP --- p.93 / Chapter 7.3 --- Summary --- p.96 / Chapter Chapter 8 --- Conclusions and Future Works --- p.98 / Chapter 8.1 --- Conclusions --- p.98 / Chapter 8.2 --- Future Works --- p.99 / References --- p.100 / Publications --- p.104
Identifer | oai:union.ndltd.org:cuhk.edu.hk/oai:cuhk-dr:cuhk_325176 |
Date | January 2005 |
Contributors | Ng, Chong Chon., Chinese University of Hong Kong Graduate School. Division of Electronic Engineering. |
Source Sets | The Chinese University of Hong Kong |
Language | English, Chinese |
Detected Language | English |
Type | Text, bibliography |
Format | print, xii, 104 leaves : ill. ; 30 cm. |
Rights | Use of this resource is governed by the terms and conditions of the Creative Commons “Attribution-NonCommercial-NoDerivatives 4.0 International” License (http://creativecommons.org/licenses/by-nc-nd/4.0/) |
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