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Efficient Implementation of RAID-6 Encoding and Decoding on a Field Programmable Gate Array (FPGA)

RAID-6 is a data encoding scheme used to provide single drive error detection and dual drive error correction for data redundancy on an array of disks. Here we present a thorough study of efficient implementations of RAID-6 on field programmable gate arrays (FPGAs). Since RAID-6 relies heavily on Galois Field Algebra (GFA), an efficient implementation of a GFA FPGA library is also presented. Through rigorous performance analysis, this work shows the most efficient ways to tradeoff FPGA resources and execution time when implementing GFA functions as well as RAID-6 encoding and decoding.

Identiferoai:union.ndltd.org:vcu.edu/oai:scholarscompass.vcu.edu:etd-2980
Date05 December 2009
CreatorsJacob, David
PublisherVCU Scholars Compass
Source SetsVirginia Commonwealth University
Detected LanguageEnglish
Typetext
Formatapplication/pdf
SourceTheses and Dissertations
Rights© The Author

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