Optimization of digital circuits still attracts much attention not only of researchers but mainly chip producers. One of new the methods for the optimization of digital circuits is cartesian genetic programming. This Master's thesis describes a new crossover operator and its implementation for cartesian genetic programming. Experimental evaluation was performed in the task of three-bit multiplier and five-bit parity circuit design.
| Identifer | oai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:235481 |
| Date | January 2012 |
| Creators | Vácha, Petr |
| Contributors | Vašíček, Zdeněk, Sekanina, Lukáš |
| Publisher | Vysoké učení technické v Brně. Fakulta informačních technologií |
| Source Sets | Czech ETDs |
| Language | Czech |
| Detected Language | English |
| Type | info:eu-repo/semantics/masterThesis |
| Rights | info:eu-repo/semantics/restrictedAccess |
Page generated in 0.0019 seconds