This paper deals with the creation of the tool for chip design in UML. The intention of this work is to present the news in the UML language version 2.0, that can be possibly used for modeling of embedded systems. Furthermore, it deals with the possibility and method of modeling in the Eclipse environment and it focuses on the Eclipse Modeling Framework. This work explains the principle of developing of graphical editors based on GMF used fully by developing tool. Finally, it discusses the chosen solution.
| Identifer | oai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:235538 |
| Date | January 2010 |
| Creators | Srna, Pavol |
| Contributors | Přikryl, Zdeněk, Hruška, Tomáš |
| Publisher | Vysoké učení technické v Brně. Fakulta informačních technologií |
| Source Sets | Czech ETDs |
| Language | Czech |
| Detected Language | English |
| Type | info:eu-repo/semantics/masterThesis |
| Rights | info:eu-repo/semantics/restrictedAccess |
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