This work describes design and implementation of radar processor in FPGA. The theoretical part is focused on Doppler radar, principles of radar signal processing methods and target platform Xilinx Zynq. The next part describes design of radar processor including its individual components and the solution is implemented. FPGA components are written in VHDL language. In the end, the implementation is evaluated and possible continuation of this work is stated.
| Identifer | oai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:363780 |
| Date | January 2017 |
| Creators | Přívara, Jan |
| Contributors | Musil, Petr, Maršík, Lukáš |
| Publisher | Vysoké učení technické v Brně. Fakulta informačních technologií |
| Source Sets | Czech ETDs |
| Language | Czech |
| Detected Language | English |
| Type | info:eu-repo/semantics/masterThesis |
| Rights | info:eu-repo/semantics/restrictedAccess |
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