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An interactive design rule checker for integrated circuit layout

An implementation of an interactive design rule checker is described in this thesis. Corner-based design rule checking algorithm is used for the implementation. Due to the locality of checking mechanism of the corner-based algorithm, it is suitable for hierarchical and interactive local design rule checking. It also allows the various design rules to be specified very easily.

Interactive operations are devised so that the design rule checker can be invoked from inside the layout editor. All the information about the violation, such as position, type of violation, and symbol definition name are provided in an interactive manner. In order to give full freedom to the user to choose the scope of checking, three options, "Flattening", "Unflattening" and "User-defined window" are implemented in creating the database to be checked. The "User-defined window" option allows hierarchical design rule checking on a design which contains global rectangles. Using these three options, very efficient hierarchical checking can be performed. / Master of Science / incomplete_metadata

Identiferoai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/50034
Date January 1985
CreatorsKim, Kwanghyun
ContributorsElectrical Engineering
PublisherVirginia Polytechnic Institute and State University
Source SetsVirginia Tech Theses and Dissertation
Detected LanguageEnglish
TypeThesis, Text
Formatxi, 144 leaves, application/pdf, application/pdf
RightsIn Copyright, http://rightsstatements.org/vocab/InC/1.0/
RelationOCLC# 13017794

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