“Smart” surveillance systems require a visual tracking system that is able to detect and follow a moving target in the field of view of a camera. Visual tracking systems have been traditionally developed either as application specific hardware or as software written for parallel architectures because of the large number of computations that have to be performed at very high speeds. This thesis describes the implementations of two visual tracking systems on a custom computing machine based on Field Programmable Gate Arrays (FPGAs). The implementations apply a coarse-to-fine search on Gaussian pyramids constructed from the images generated by a camera. One system tracks a target of size 16x16 in an image sequence with output images of size 256x256. This system is capable of operating at 30 pyramids per second. The second system tracks a target of size 16x16 in an image sequence with output images of size 512x512. This system is capable of operating at 15 pyramids per second. Both systems are designed with pipelined architectures and numerical computations are handled using a SIMD approach. / Master of Science
| Identifer | oai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/45460 |
| Date | 07 November 2008 |
| Creators | Pudipeddi, Bharadwaj |
| Contributors | Electrical Engineering |
| Publisher | Virginia Tech |
| Source Sets | Virginia Tech Theses and Dissertation |
| Language | English |
| Detected Language | English |
| Type | Thesis, Text |
| Format | viii, 93 leaves, BTD, application/pdf, application/pdf |
| Rights | In Copyright, http://rightsstatements.org/vocab/InC/1.0/ |
| Relation | OCLC# 35332693, LD5655.V855_1996.P835.pdf |
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