<p>Recently, low-density parity-check (LDPC) codes have attracted much attention because of their excellent error correcting performance and highly parallelizable decoding scheme. However, the effective VLSI implementation of and LDPC decoder remains a big challenge and is a crucial issue in determining how well we can exploit the benefits of the LDPC codes in the real applications. In this master thesis report, following a error coding background, we describe Low-Density Parity-Check codes and their decoding algorithm, and also requirements and architectures of LPDC decoder implementations.</p>
Identifer | oai:union.ndltd.org:UPSALLA/oai:DiVA.org:liu-2160 |
Date | January 2004 |
Creators | Pirou, Florent |
Publisher | Linköping University, Department of Electrical Engineering, Institutionen för systemteknik |
Source Sets | DiVA Archive at Upsalla University |
Language | English |
Detected Language | English |
Type | Student thesis, text |
Relation | LiTH-ISY-Ex, ; 3529 |
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