The work deals with design, simulation and preparation of laboratory preparation. The main aim of the thesis is to design and implement a simple noise generator, signal sources, mixer and phase lock loop for teaching purposes.
Identifer | oai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:413137 |
Date | January 2020 |
Creators | Uhliar, Marek |
Contributors | Hruboš, Zdeněk, Šotner, Roman |
Publisher | Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií |
Source Sets | Czech ETDs |
Language | Slovak |
Detected Language | English |
Type | info:eu-repo/semantics/masterThesis |
Rights | info:eu-repo/semantics/restrictedAccess |
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