Bibliography: leaves 216-224. / xix, 224 leaves : ill. ; 30 cm. / Title page, contents and abstract only. The complete thesis in print form is available from the University Library. / This thesis describes a collection of design techniques engineered for high speed operation. A new gate representation is proposed to better reflect their functionality in an asynchronous domain. Two microprocessors (ECSTAC and ECSCESS) are implemented as an illustration of these design techniques. / Thesis (Ph.D.)--University of Adelaide, Dept. of Electrical and Electronic Engineering, 1998?
| Identifer | oai:union.ndltd.org:ADTP/260320 |
| Date | January 1997 |
| Creators | Morton, Shannon V. |
| Source Sets | Australiasian Digital Theses Program |
| Language | en_US |
| Detected Language | English |
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