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A specification-based design tool for artificial neural networks.

Wong Wai. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1992. / Includes bibliographical references (leaves 78-80). / Chapter 1. --- Introduction --- p.1 / Chapter 1.1. --- Specification Environment --- p.2 / Chapter 1.2. --- Specification Analysis --- p.2 / Chapter 1.3. --- Outline --- p.3 / Chapter 2. --- Survey --- p.4 / Chapter 2.1. --- Concurrence Specification --- p.4 / Chapter 2.1.1. --- Sequential Approach --- p.5 / Chapter 2.1.2. --- Mapping onto Concurrent Architecture --- p.6 / Chapter 2.1.3. --- Automatic Concurrence Introduction --- p.7 / Chapter 2.2. --- Specification Analysis --- p.8 / Chapter 2.2.1. --- Motivation --- p.8 / Chapter 2.2.2. --- Cyclic Dependency --- p.8 / Chapter 3. --- The Design Tool --- p.11 / Chapter 3.1. --- Specification Environment --- p.11 / Chapter 3.1.1. --- Framework --- p.11 / Chapter 3.1.1.1. --- Formal Neurons --- p.12 / Chapter 3.1.1.2. --- Configuration --- p.12 / Chapter 3.1.1.3. --- Control Neuron --- p.13 / Chapter 3.1.2. --- Dataflow Specification --- p.14 / Chapter 3.1.2.1. --- Absence of Control Information --- p.14 / Chapter 3.1.2.2. --- Single-Valued Variables & Explicit Time Indices --- p.14 / Chapter 3.1.2.3. --- Explicit Notations --- p.15 / Chapter 3.1.3. --- User Interface --- p.15 / Chapter 3.2. --- Specification Analysis --- p.16 / Chapter 3.2.1. --- Data Dependency Analysis --- p.16 / Chapter 3.2.2. --- Attribute Analysis --- p.16 / Chapter 4. --- BP-Net Specification --- p.18 / Chapter 4.1. --- BP-Net Paradigm --- p.18 / Chapter 4.1.1. --- Neurons of a BP-Net --- p.18 / Chapter 4.1.2. --- Configuration of BP-Net --- p.20 / Chapter 4.2. --- Constant Declarations --- p.20 / Chapter 4.3. --- Formal Neuron Specification --- p.21 / Chapter 4.3.1. --- Mapping the Paradigm --- p.22 / Chapter 4.3.1.1. --- Mapping Symbols onto Parameter Names --- p.22 / Chapter 4.3.1.2. --- Mapping Neuron Equations onto Internal Functions --- p.22 / Chapter 4.3.2. --- Form Entries --- p.23 / Chapter 4.3.2.1. --- Neuron Type Entry --- p.23 / Chapter 4.3.2.2. --- "Input, Output and Internal Parameter Entries" --- p.23 / Chapter 4.3.2.3. --- Initial Value Entry --- p.25 / Chapter 4.3.2.4. --- Internal Function Entry --- p.25 / Chapter 4.4. --- Configuration Specification --- p.28 / Chapter 4.4.1. --- Fonn Entries --- p.29 / Chapter 4.4.1.1. --- Neuron Label Entry --- p.29 / Chapter 4.4.1.2. --- Neuron Character Entry --- p.30 / Chapter 4.4.1.3. --- Connection Pattern Entry --- p.31 / Chapter 4.4.2. --- Characteristics of the Syntax --- p.33 / Chapter 4.5. --- Control Neuron Specification --- p.34 / Chapter 4.5.1. --- Form Entries --- p.35 / Chapter 4.5.1.1. --- "Global Input, Output, Parameter & Initial Value Entries" --- p.35 / Chapter 4.5.1.2. --- Input & Output File Entries --- p.36 / Chapter 4.5.1.3. --- Global Function Entry --- p.36 / Chapter 5. --- Data Dependency Analysis_ --- p.40 / Chapter 5.1. --- Graph Construction --- p.41 / Chapter 5.1.1. --- Simplification and Normalization --- p.41 / Chapter 5.1.1.1. --- Removing Non-Esscntial Information --- p.41 / Chapter 5.1.1.2. --- Removing File Record Parameters --- p.42 / Chapter 5.1.1.3. --- Rearranging Temporal offset --- p.42 / Chapter 5.1.1.4. --- Conservation of Temporal Relationship --- p.43 / Chapter 5.1.1.5. --- Zero/Negative Offset for Determining Parameters --- p.43 / Chapter 5.1.2. --- Internal Dependency Graphs (IDGs) --- p.43 / Chapter 5.1.3. --- IDG of Control Neuron (CnIDG) --- p.45 / Chapter 5.1.4. --- Global Dependency Graphs (GDGs) --- p.45 / Chapter 5.2. --- Cycle Detection --- p.48 / Chapter 5.2.1. --- BP-Net --- p.48 / Chapter 5.2.2. --- Other Examples --- p.49 / Chapter 5.2.2.1. --- The Perceptron --- p.50 / Chapter 5.2.2.2. --- The Boltzmann Machinc --- p.51 / Chapter 5.2.3. --- Number of Cycles --- p.52 / Chapter 5.2.3.1. --- Different Number of Layers --- p.52 / Chapter 5.2.3.2. --- Different Network Types --- p.52 / Chapter 5.2.4. --- Cycle Length --- p.53 / Chapter 5.2.4.1. --- Different Number of Layers --- p.53 / Chapter 5.2.4.2. --- Comparison Among Different Networks --- p.53 / Chapter 5.2.5. --- Difficulties in Analysis --- p.53 / Chapter 5.3. --- Dependency Cycle Analysis --- p.54 / Chapter 5.3.1. --- Temporal Index Analysis --- p.54 / Chapter 5.3.2. --- Non-Temporal Index Analysis --- p.55 / Chapter 5.3.2.1. --- A Simple Example --- p.55 / Chapter 5.3.2.2. --- Single Parameter --- p.56 / Chapter 5.3.2.3. --- Multiple Parameters --- p.57 / Chapter 5.3.3. --- Combined Method --- p.58 / Chapter 5.3.4. --- Scheduling --- p.58 / Chapter 5.3.4.1. --- Algorithm --- p.59 / Chapter 5.3.4.2. --- Schedule for the BP-Net --- p.59 / Chapter 5.4. --- Symmetry in Graph Construction --- p.60 / Chapter 5.4.1. --- Basic Approach --- p.60 / Chapter 5.4.2. --- Construction of the BP-Net GDG --- p.61 / Chapter 5.4.3. --- Limitation --- p.63 / Chapter 6. --- Attribute Analysis__ --- p.64 / Chapter 6.1. --- Parameter Analysis --- p.64 / Chapter 6.1.1. --- Internal Dependency Graphs (IDGs) --- p.65 / Chapter 6.1.1.1. --- Correct Properties of Parameters in IDGs --- p.65 / Chapter 6.1.1.2. --- Example --- p.65 / Chapter 6.1.2. --- Combined Internal Dependency Graphs (CIDG) --- p.66 / Chapter 6.1.2.1. --- Tests on Parameters of CIDG --- p.66 / Chapter 6.1.2.2. --- Example --- p.67 / Chapter 6.1.3. --- Finalized Neuron Obtained --- p.67 / Chapter 6.1 4. --- CIDG of the BP-Net --- p.68 / Chapter 6.2. --- Constraint Checking --- p.68 / Chapter 6.2.1. --- "Syntactic, Semantic and Simple Checkings" --- p.68 / Chapter 6.2.1.1. --- The Syntactic & Semantic Techniques --- p.68 / Chapter 6.2.1.2. --- Simple Matching --- p.70 / Chapter 6.2.2. --- Constraints --- p.71 / Chapter 6.2.2.1. --- Constraints on Formal Neuron --- p.71 / Chapter 6.2.2.2. --- Constraints on Configuration --- p.72 / Chapter 6.2.2.3. --- Constraints on Control Neuron --- p.73 / Chapter 6.3. --- Complete Checking Procedure --- p.73 / Chapter 7. --- Conclusions_ --- p.75 / Chapter 7.1. --- Limitations --- p.76 / Chapter 7.1.1. --- Exclusive Conditional Dependency Cycles --- p.76 / Chapter 7.1.2. --- Maximum Parallelism --- p.77 / Reference --- p.78 / Appendix --- p.1 / Chapter I. --- Form Syntax --- p.1 / Chapter A. --- Syntax Conventions --- p.1 / Chapter B. --- Form Definition --- p.1 / Chapter 1. --- Form Structure --- p.1 / Chapter 2. --- Constant Declaration --- p.1 / Chapter 3. --- Formal Neuron Declaration --- p.1 / Chapter 4. --- Configuration Declaration --- p.2 / Chapter 5. --- Control Neuron --- p.2 / Chapter 6. --- Supplementary Definition --- p.3 / Chapter II. --- Algorithms --- p.4 / Chapter III. --- Deadlock & Dependency Cycles --- p.14 / Chapter A. --- Deadlock Prevention --- p.14 / Chapter 1. --- Necessary Conditions for Deadlock --- p.14 / Chapter 2. --- Resource Allocation Graphs --- p.15 / Chapter 3. --- Cycles and Blocked Requests --- p.15 / Chapter B. --- Deadlock in ANN Systems --- p.16 / Chapter 1. --- Shared resources --- p.16 / Chapter 2. --- Presence of the Necessary Conditions for Deadlocks --- p.16 / Chapter 3. --- Operation Constraint for Communication --- p.16 / Chapter 4. --- Checkings Required --- p.17 / Chapter C. --- Data Dependency Graphs --- p.17 / Chapter 1. --- Simplifying Resource Allocation Graphs --- p.17 / Chapter 2. --- Expanding into Parameter Level --- p.18 / Chapter 3. --- Freezing the Request Edges --- p.18 / Chapter 4. --- Reversing the Edge Directions --- p.18 / Chapter 5. --- Mutual Dependency Cycles --- p.18 / Chapter IV. --- Case Studies --- p.19 / Chapter A. --- BP-Net --- p.19 / Chapter 1. --- Specification Forms --- p.19 / Chapter 2. --- Results After Simple Checkings --- p.21 / Chapter 3. --- Internal Dependency Graphs Construction --- p.21 / Chapter 4. --- Results From Parameter Analysis --- p.21 / Chapter 5. --- Global Dependency Graphs Construction --- p.21 / Chapter 6. --- Cycles Detection --- p.21 / Chapter 7. --- Time Subscript Analysis --- p.21 / Chapter 8. --- Subscript Analysis --- p.21 / Chapter 9. --- Scheduling --- p.21 / Chapter B. --- Perceptron --- p.21 / Chapter 1. --- Specification Forms --- p.22 / Chapter 2. --- Results After Simple Checkings --- p.24 / Chapter 3. --- Internal Dependency Graphs Construction --- p.24 / Chapter 4. --- Results From Parameter Analysis --- p.25 / Chapter 5. --- Global Dependency Graph Construction --- p.25 / Chapter 6. --- Cycles Detection --- p.25 / Chapter 7. --- Time Subscript Analysis --- p.25 / Chapter 8. --- Subscript Analysis --- p.25 / Chapter 9. --- Scheduling --- p.25 / Chapter C. --- Boltzmann Machine --- p.26 / Chapter 1. --- Specification Forms --- p.26 / Chapter 2. --- Results After Simple Checkings --- p.35 / Chapter 3. --- Graphs Construction --- p.35 / Chapter 4. --- Results From Parameter Analysis --- p.36 / Chapter 5. --- Global Dependency Graphs Construction --- p.36 / Chapter 6. --- Cycle Detection --- p.36 / Chapter 7. --- Time Subscript Analysis --- p.36 / Chapter 8. --- Subscript Analysis --- p.36 / Chapter 9. --- Scheduling --- p.36

Identiferoai:union.ndltd.org:cuhk.edu.hk/oai:cuhk-dr:cuhk_318987
Date January 1992
ContributorsWong, Wai., Chinese University of Hong Kong Graduate School. Division of Computer Science.
PublisherChinese University of Hong Kong
Source SetsThe Chinese University of Hong Kong
LanguageEnglish
Detected LanguageEnglish
TypeText, bibliography
Formatprint, iv, 80, 48 leaves : ill. ; 30 cm.
RightsUse of this resource is governed by the terms and conditions of the Creative Commons “Attribution-NonCommercial-NoDerivatives 4.0 International” License (http://creativecommons.org/licenses/by-nc-nd/4.0/)

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