Reliability, besides the performance, is one of the important key factors of success of any technology. While a product should perform at best as desired, it must also be capable of working for intended period of life without any degradation or wear-out failure, caused by any operational parameter. For example it does no good to manufacture a super fast microprocessor if that fails within few seconds. For the product to meet the intended reliability we must understand the mechanisms that lead to unreliability or failure of the devices. The efforts to understand the fundamental physics of the mechanisms that lead to the failure of the devices has developed a branch of physics named as “reliability physics” of “physics of failure”. On the basis of the understanding of failure mechanism, new design rule can be followed and new material can be applied to improve the reliability of the product.
Microelectronic technology also, which is one of the fastest growing technology, has been facing challenges posed by the reliability issues from time to time. There are number of physical failure mechanisms that can affect the reliability of a microelectronic device. Time dependent dielectric breakdown (TDDB), hot carrier damage and current induced damage of interconnects are only to name a few common mechanisms. Among these, the failure of interconnects due to current has been the oldest and persistence reliability issue since the beginning of development of the microelectronic technology. Understanding the physics of the processes that lead to failure of a current carrying film is the main interest of this thesis work.
In this investigation, we have carried out a systematic study to understand stability of metal nanowires against damage caused by current stressing and its size dependency. We observe the wires of smaller diameter, having an electronic mean free path larger than or comparable to its diameter are more stable against current stressing. In wires of larger diameter (100 nm or more) the probability of the damage is more. This probably is due to presence of grain boundary type extended defects that allow low energy diffusion path. To our knowledge this is the first experimental investigation to study the stability of nanowires against high current and in-situ measurement of noise during current stressing on them. In the previous investigations by other groups observed that the nanowires without any passivation got damaged by stressing current density which was even lower than the one we used for stressing. To our knowledge this is the first observation of long lasting stability of nanowires, of dimension down to 15 nm, when they are encapsulated in dielectric, an environment that an interconnect has to see in the real integrated circuit devices.
In the second chapter we will describe the sample preparation method, characterization of samples and the experimental setups we had used. The results of in-situ noise measurement are described in the third chapter. We will describe our in-situ scanning thermal microscopy study in the fourth chapter. Then in the fifth chapter, we will present our simulation investigations on current induced damage of film. Finally, we will put the concluding remarks on this thesis work and the results in the sixth chapter. We have studied similar damage processes in metal nanowires also. In an appendix we will present our approach and major results of this investigation.
| Identifer | oai:union.ndltd.org:IISc/oai:etd.ncsi.iisc.ernet.in:2005/886 |
| Date | 08 1900 |
| Creators | Bora, Achyut |
| Contributors | Raychaudhuri, A K, Ghosh, Arindam |
| Source Sets | India Institute of Science |
| Language | en_US |
| Detected Language | English |
| Type | Thesis |
| Relation | G22322 |
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