This work describes the implementation of DC to DC converter for Smart Dust in 65 nm CMOS technology. The purpose of a DC to DC converter is to convert a battery voltage of 1 Vto a lower voltage of 0.5 V used by the processor. The topology used in this DC to DC converteris of Buck type which converts a higher voltage to lower voltage with the advantage of givinghigh efficiency about 75%. The system uses PWM (Pulse width modulation) technique. It usesnon-overlapping clock generation technique for reducing the power consumption. The systemprovides up to 5 mA load current and has power consumption of 2.5 mW.
| Identifer | oai:union.ndltd.org:UPSALLA1/oai:DiVA.org:liu-77247 |
| Date | January 2012 |
| Creators | Nisar, Kashif |
| Publisher | Linköpings universitet, Institutionen för systemteknik, Linköpings universitet, Tekniska högskolan |
| Source Sets | DiVA Archive at Upsalla University |
| Language | English |
| Detected Language | English |
| Type | Student thesis, info:eu-repo/semantics/bachelorThesis, text |
| Format | application/pdf |
| Rights | info:eu-repo/semantics/openAccess |
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