Demand for capable and reliable semiconductor and fabrication technology for high temperature and power electronics applications has been increasing in recent years. Silicon Carbide (SiC), as a wide bandgap compound semiconductor, demonstrates superior characteristics such as high thermal conductivity, high breakdown voltage, and long-lasting reliable operation at elevated temperature. SiC-based circuits and systems are capable to offer significant performance enhancements to various applications. Integrated power management units and conversion modules in HEVs, integrated sensors for aircraft engines, development of small-sized portable power generators are among many applications that require reliable circuits with long-lasting functional lifetime. Nevertheless, there are numerous challenges associated with the design and fabrication of SiC-based circuits. The aim of this research is to practically design and implement novel operational amplifiers (opamps) based on Vertical Channel 4H-SiC JFET (SiC JFET) that can be utilized as sub-circuits of integrated SiC JFET-based circuits and systems. Recently, SiC power JFET-based power management units were developed that deploy non-SiC JFET-based circuits for analog signal processing, driving, and control, because all SiC JFET-based circuits were not available for full integration. However, utilizing SiC JFET for analog design (in order to close the mentioned gap) exhibits significant design challenges, even at room temperature. These fundamental challenges are low intrinsic gain, the requirement to limit the gate to source voltage range, and restrictions on utilizing channel length as a design parameter due to fabrication complexity. These challenges must be successfully overcome at room temperature, before moving towards high temperature SiC JFET-based analog design. The main objective of this dissertation is to establish a design base, overcome the challenges, demonstrate the feasibility, and present all SiC JFET-based opamps that are designed for gain, CMRR, and overall performance. Before attempting to design, both Enhancement and Depletion Mode SiC JFETs are characterized, analyzed, and modeled for simulation. Unique and reliable opamp configurations are presented that take design requirements into account, use threshold voltage instead of channel length as a design parameter, and employ gain enhancement techniques while obtaining maximum possible bandwidth. The final opamps are fabricated and tested and the results show that the objective is accomplished.
| Identifer | oai:union.ndltd.org:MSSTATE/oai:scholarsjunction.msstate.edu:td-2308 |
| Date | 11 December 2009 |
| Creators | Maralani, Ayden |
| Publisher | Scholars Junction |
| Source Sets | Mississippi State University |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | Theses and Dissertations |
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