With the development of modern electronics, the demand for high quality power supplies has become more urgent than ever. For power MOSFETs, maintaining the trend of reducing on-state resistance (conduction loss) without sacrificing switching performance is a severe challenge. In this work, our research is focused on implementing strained silicon and silicon germanium in power MOFETs to enhance carrier mobility, thus achieving the goal of reducing specific on-state resistance. We propose an N-channel super-lattice trench MOSFET, a P-channel sidewall channel trench MOSFET and P-Channel LDMOS with strained Si/SiGe channels. A set of fabrication processes highly compatible with conventional Si technology is developed to fabricate proposed devices. The mobility enhancement is observed to be 20%, 40% and 35% respectively for N-channel, Pchannel trench MOSFET and LDMOS respectively and the on-state resistance is reduced by 10%, 20% and 22% without sacrificing other device performance parameters.
| Identifer | oai:union.ndltd.org:ucf.edu/oai:stars.library.ucf.edu:etd-2680 |
| Date | 01 January 2010 |
| Creators | Sun, Shan |
| Publisher | STARS |
| Source Sets | University of Central Florida |
| Language | English |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | Electronic Theses and Dissertations |
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