International Telemetering Conference Proceedings / October 25-28, 1999 / Riviera Hotel and Convention Center, Las Vegas, Nevada / In order to reduce the ground segment equipment cost for small space missions, the French
national space center (CNES) had the need to develop a CCSDS down-link interface board
for low telemetry rates (< 1.5 Mb/s).
This board performs frame synchronization and Reed-Solomon decoding.
An important part of this design was the Reed-Solomon decoder development. In order to
maintain low recurrent cost for this board, this decoder was realized in FPGA technology.
Reed-Solomon decoding function, interleaving function (from 1 to 5) and virtual fill
management are included in the same component. All set-up parameters are software
programmable via the PCI bus, data and status are also available via the PCI bus under
windows NT operating system.
This paper presents the main features of this board and an overview of the Reed-Solomon
decoder development.
| Identifer | oai:union.ndltd.org:arizona.edu/oai:arizona.openrepository.com:10150/607329 |
| Date | 10 1900 |
| Creators | Lassère, François, Ferréol, Max, Rocher, Jean-Pierre |
| Contributors | Centre National d’Etudes Spatiales |
| Publisher | International Foundation for Telemetering |
| Source Sets | University of Arizona |
| Language | en_US |
| Detected Language | English |
| Type | text, Proceedings |
| Rights | Copyright © International Foundation for Telemetering |
| Relation | http://www.telemetry.org/ |
Page generated in 0.0022 seconds