The methods of improving the cache performance are multiform and advanced of
nowadays. We are concerned about the cache and TLB utility. To reduce the context switch
cost on system, we utilize an address-space switching hardware of ARMS3C2410 processor
to realize the fast address switching mechanism. The Fast Context Switch can help to improve
cache and TLB utility and performance.
Fast Context Switch is a method that can help to improve the cache performance. The
key feature of Fast Context Switch is without any cache and TLB flush on process context
switching. To implement Fast Context Switch, we address the different processes to different
address space by process ID. When context switch occurs, we can just change the working
space without the cache and TLB flush.
This thesis emphasizes on the performance measure for improvement on the cache
and TLB. We use a high dependable microkernel architecture for message passing between
processes, this microkernel called MinixARM. Rely on the microkernel, we can more easily
understand and analyze the system performance and additional cost of the cache scheme. We
provide more complete performance tests by benchmarks, fast context switch can increase the
system performance about 65% at most.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0114109-084659 |
| Date | 14 January 2009 |
| Creators | Lin, Cheng-chi |
| Contributors | Shiann-Rong Kuang, Ming-Chao. Chiang, Chung-Nan Lee |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | English |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0114109-084659 |
| Rights | not_available, Copyright information available at source archive |
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