Return to search

On real time digital phase locked loop implementation with application to timing recovery : a thesis submitted in partial fulfillment of the requirements for the degree of Master of Engineering in Electrical and Electronic Engineering at the University of Canterbury, Christchurch, New Zealand /

Thesis (M.E.)--University of Canterbury, 2006. / Typescript (photocopy). "November 2006." Includes bibliographical references (leaves 121-124). Also available via the World Wide Web.

Identiferoai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/174096498
Date January 1900
CreatorsKippenberger, Roger.
Source SetsOCLC
LanguageEnglish
Detected LanguageEnglish

Page generated in 0.0018 seconds