The charge storage in the a-Si:H PIN photodiode under different light wavelength illuminations has been studied. The leakage current-voltage and capacitance-voltage curves under three fundamental visible light wavelengths, i.e., red, green and blue light were measured. The apparent charge storage density in the negative voltage range was quantified from the capacitance-voltage curve; charges in the positive voltage range were estimated from the leakage current-voltage curve. The measurement was verified with a pre-fabricated circuit which is a charge storage readout device.
The diode under the long wavelength light illumination condition stored more charges than that under the short wavelength light illumination condition because the former could penetrate the intrinsic a-Si:H layer deeper than the latter could. The leakage current and charge storage capacity of the diode are determined by the generation of electron-hole pairs and the depletion of charges in the intrinsic layer as well as the supply of charges from the electrodes.
A comparison of charge storage capacities of diodes with different intrinsic layer thicknesses is also presented. The number of photogenerated carriers increases with the thickness of the i-layer due to the long penetration depth, but the junction capacitance decreases which results in the decrease of the charge storage capacity. The tradeoff between the photogenerated carriers and the capacitance, combined with thickness-dependent recombination mechanisms increases the complexity of the PIN diode charge storage capacity.
The n+- and p+-contact region should be heavily doped so that the storage charge can be confined in the i-layer without diffusing and recombining in the contact region. The n+ and p+ films, prepared by plasma enhanced chemical vapor deposition (PECVD) of a wide range of doping concentration, were fabricated to achieve low bulk resistivity and ohmic contacts with the metal electrodes.
Charge storage density was improved after the optimization doped layers in both positive gate voltage and negative gate voltage. The low resistivity contact layers, reduced density of state in the intrinsic layer, and graded p+/i layer account for the enhancement of the charge storage density in the optimized diode.
| Identifer | oai:union.ndltd.org:tamu.edu/oai:repository.tamu.edu:1969.1/149348 |
| Date | 03 October 2013 |
| Creators | Wu, Shu-Hsien |
| Contributors | Kuo, Yue, Ross, Joseph H., Eknoyan, Ohannes, Su, Chin B. |
| Source Sets | Texas A and M University |
| Language | English |
| Detected Language | English |
| Type | Thesis, text |
| Format | application/pdf |
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