The purpose of this dissertation describes several power optimization techniques for energy efficient datacenters. To achieve this goal, it approaches power dissipation holistically for entire datacenters and analyzes them layer-by-layer from (1) the infrastructure level, (2) the system level, and all the way down to (3) the micro-architecture level. First, for infrastructure-level power optimization of datacenters, this work presents infrastructure-level mathematical models and a holistic warehouse-scale datacenter power and performance simulator, SimWare. Experiments using SimWare show a high loss of cooling efficiency resulting from the non-uniform inlet air temperature distribution across servers. Second, this study describes a system-level technique, ATAC, which maximizes power efficiency while minimizing overheating. Finally, this dissertation describes a micro-architecture level technique under the context of emerging non-volatile memory technologies. We first show that storing more than one bit per cell, or multiple bits per cell, ends up with much higher soft-error rates than conventional technologies. However, multi-bit per cell technology can still be used as approximate storage. To this end, we propose a new class of multi-bit per cell memory in which both a precise bit and an approximate bit are located in a physical cell. With the development of these techniques, the contribution of this body of work is a reduction in the power consumption of datacenters in a holistic way, eliminating one of the most important hurdles to the proliferation of cloud-computing environments.
| Identifer | oai:union.ndltd.org:GATECH/oai:smartech.gatech.edu:1853/54847 |
| Date | 27 May 2016 |
| Creators | Yeo, Sungkap |
| Contributors | Conte, Thomas |
| Publisher | Georgia Institute of Technology |
| Source Sets | Georgia Tech Electronic Thesis and Dissertation Archive |
| Language | en_US |
| Detected Language | English |
| Type | Dissertation |
| Format | application/pdf |
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