The multi-resonant technique, a novel concept in dc/dc power conversion, is proposed. The essence of the multi-resonant power conversion is the effective utilization of the major parasitic reactive components of the power stage, including the leakage inductance of the power transformer, output capacitance of the power MOSFET, and junction capacitance of the rectifier. The multi-resonant operation is achieved by addition of a resonant switching network around the semiconductor switching devices.
Zero-voltage-switched multi-resonant converters (ZVS-MRCs) are proposed for high-frequency power conversion applications. ZVS-MRCs use a resonant network with one resonant inductor and two resonant capacitors. The resonant inductor is in series with the leakage inductance of the power transformer. One of the resonant capacitors is effectively in parallel with the power MOSFET, while the other resonant capacitor is effectively in parallel with the rectifier. As a result of the arrangement of the multi-resonant network, the major parasitic reactances of the power stage are utilized in the circuit. In addition, all semiconductor devices operate with zero-voltage switching, which substantially reduces the switching losses and permits efficient operation in multi-megahertz range, with moderate transistor voltage stress and wide load range. A dc analysis is presented for the basic converter topologies: buck, boost, buck-boost, Cuk, Zeta, and SEPIC. The analysis is performed using a generalized multi-resonant switch concept.
The forward ZVS-MRC topology is employed to develop a state-of-the-art, high-density, on-board dc/dc power converter. The converter operates with a nominal input of 50 V and an output of 5 V at 10 A. The nominal switching frequency is 2.7 MHz. The complete hybridized converter has a power density of 50 W/in³ and a nominal efficiency of 83%. The feasibility of increasing conversion efficiency at several megahertz by means of resonant synchronous rectification is investigated using circuit analysis with nonlinear-capacitance MOSFET and Schottky diode models. / Ph. D.
| Identifer | oai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/37404 |
| Date | 26 February 2007 |
| Creators | Tabisz, Wojciech Antoni |
| Contributors | Electrical Engineering, Lee, Fred, Vorperian, Vatche, Chen, De Yu "Dan", Stephenson, F. William, Kohler, Werner |
| Publisher | Virginia Tech |
| Source Sets | Virginia Tech Theses and Dissertation |
| Language | English |
| Detected Language | English |
| Type | Dissertation, Text |
| Format | xvii, 320 leaves, BTD, application/pdf, application/pdf |
| Rights | In Copyright, http://rightsstatements.org/vocab/InC/1.0/ |
| Relation | OCLC# 23716182, LD5655.V856_1990.T325.pdf |
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