With the rapid development of information technology, more and more bandwidth is required to transmit multimedia data. Since local communication networks are moving to wireless domain, it brings up great challenges for making integrated wideband wireless front-ends suitable for these applications. RF filtering is a fundamental need in all wireless front-ends and is one of the most difficult parts to be integrated. This has been a major obstacle to the implementation of low power and low cost integrated wireless terminals. <p> Lots of previous work has been done to make integrated RF filters applicable to these applications. However, some of these filters are not designed with standard CMOS technology. Some of them are not designed in desired frequency bands and others do not have sufficient frequency bandwidth. This research demonstrates the design of a tunable wideband RF filter that operates at 3.6 GHz and can be easily changed to a higher frequency range up to 5 GHz. This filter is superior to the previous designs in the following aspects: a) wider bandwidth, b) easier to tune, c) balancing in noise and linearity, and d) using standard CMOS technology.
The design employs the state-of-the-art inductor degenerated LNA, acting as a transconductor to minimize the overall noise figure. A Q-enhancement circuit is employed to compensate the loss from lossy on-chip spiral inductors. Center frequency and bandwidth tuning circuits are also embedded to make the filter suitable for multi band operations. <p> At first, a second order bandpass filter prototype was designed in the standard 0.18 ìm CMOS process. Simulation results showed that at 3.6 GHz center frequency and with a 60-MHz bandwidth, the input third-order intermodulation product (IIP3) and input-referred 1 dB compression point (P1dB) was -22.5 dBm and -30.5 dBm respectively. The image rejection at 500 MHz away from the center frequency was 32 dB (250 MHz intermediate frequency). The Q of the filter was tunable over 3000 and the center frequency tuning range was about 150 MHz. <p> By cascading three stages of second order filters, a sixth order filter was designed to enhance the image rejection ability and to extend the filter bandwidth. The sixth order filter had been fabricated in the standard 0.18 ìm CMOS process using 1.8-V supply. The chip occupies only 0.9 mm 0.9 mm silicon area and has a power consumption of 130-mW.
The measured center frequency was tunable from 3.54 GHz to 3.88 GHz, bandwidth was tunable from 35 MHz to 80 MHz. With a 65 MHz bandwidth, the filter had a gain of 13 dB, an IIP3 of -29 dBm and a P1dB of -46 dBm.
Identifer | oai:union.ndltd.org:USASK/oai:usask.ca:etd-04062004-111305 |
Date | 14 April 2004 |
Creators | Ge, Jiandong |
Contributors | Nguyen, Ha H., Faried, Sherif O., Dinh, Anh van, Bolton, Ronald J., Palmer, Ronald |
Publisher | University of Saskatchewan |
Source Sets | University of Saskatchewan Library |
Language | English |
Detected Language | English |
Type | text |
Format | application/pdf |
Source | http://library.usask.ca/theses/available/etd-04062004-111305/ |
Rights | unrestricted, I hereby certify that, if appropriate, I have obtained and attached hereto a written permission statement from the owner(s) of each third party copyrighted matter to be included in my thesis, dissertation, or project report, allowing distribution as specified below. I certify that the version I submitted is the same as that approved by my advisory committee. I hereby grant to University of Saskatchewan or its agents the non-exclusive license to archive and make accessible, under the conditions specified below, my thesis, dissertation, or project report in whole or in part in all forms of media, now or hereafter known. I retain all other ownership rights to the copyright of the thesis, dissertation or project report. I also retain the right to use in future works (such as articles or books) all or part of this thesis, dissertation, or project report. |
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