As the demand for portable electronic devices increase, the need to replace off-chip discrete devices with on-chip devices is imperative. Inductors are one such passive device that is widely used in low noise amplifiers, oscillators, etc. Current on-chip spiral inductors suffer from large parasitics and area for a meager value of inductance and quality factor. The need to overcome these issues has led to the development inductors with new geometries housing magnetic cores that show an enhanced inductance compared to the air core coil.
In this thesis, we discuss the design of a three-dimensional spiral inductor with a Co-Fe nanoparticle core that will be fabricated as per the process rules set by VT MT SPL. The changes in the value of the inductance, resistance, quality factor and parasitics are studied for varying number of turns of the coil, thickness of the coil, spacing between turns and different materials used as the coil. An optimum design incorporating the least parasitics and reasonable inductance is proposed. / Master of Science
| Identifer | oai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/34565 |
| Date | 25 August 2011 |
| Creators | Surendra, Kanchana |
| Contributors | Electrical and Computer Engineering, Meehan, Kathleen, Davis, William A., Patterson, Cameron D. |
| Publisher | Virginia Tech |
| Source Sets | Virginia Tech Theses and Dissertation |
| Language | English |
| Detected Language | English |
| Type | Thesis |
| Format | application/pdf, application/pdf |
| Rights | In Copyright, http://rightsstatements.org/vocab/InC/1.0/ |
| Relation | Surendra_K_T_2011.pdf, Surendra_K_T_2011_Copyright.pdf |
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